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author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2012-11-20 13:27:43 -0200 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-11-21 17:47:11 +0100 |
commit | d567b07fce8f55f82e2cfe040cd74f7b4997ff38 (patch) | |
tree | 7f25f959da356ad1fba176f522f87b45f5034d4b /drivers/gpu/drm/i915/i915_drv.h | |
parent | 54075a7d75732147c32f7a99af5218f7d0f62596 (diff) | |
download | lwn-d567b07fce8f55f82e2cfe040cd74f7b4997ff38.tar.gz lwn-d567b07fce8f55f82e2cfe040cd74f7b4997ff38.zip |
drm/i915: fix intel_ddi_get_cdclk_freq for ULT machines
For now, this code is just used by the eDP AUX channel frequency.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 669afcabe3b1..87c06f97fa89 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1161,6 +1161,8 @@ struct drm_i915_file_private { #define IS_VALLEYVIEW(dev) (INTEL_INFO(dev)->is_valleyview) #define IS_HASWELL(dev) (INTEL_INFO(dev)->is_haswell) #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile) +#define IS_ULT(dev) (IS_HASWELL(dev) && \ + ((dev)->pci_device & 0xFF00) == 0x0A00) /* * The genX designation typically refers to the render engine, so render |