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authorDeepak S <deepak.s@linux.intel.com>2014-07-10 13:16:24 +0530
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-07-11 18:22:00 +0200
commit67c3bf6f55a97a0915a0f9ea07278a3073cc9601 (patch)
treeefed3f9d8cc82c764e60f0401b5f74b30c8cd55b /drivers/gpu/drm/i915/i915_drv.h
parent74c4f62bcdbb0e2ee115197eafd4edc05bbcf55c (diff)
downloadlwn-67c3bf6f55a97a0915a0f9ea07278a3073cc9601.tar.gz
lwn-67c3bf6f55a97a0915a0f9ea07278a3073cc9601.zip
drm/i915: populate mem_freq/cz_clock for chv
We need mem_freq or cz clock for freq/opcode conversion Signed-off-by: Deepak S <deepak.s@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7031757628ff..8620ea91e108 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -931,6 +931,7 @@ struct intel_gen6_power_mgmt {
u8 efficient_freq; /* AKA RPe. Pre-determined balanced frequency */
u8 rp1_freq; /* "less than" RP0 power/freqency */
u8 rp0_freq; /* Non-overclocked max frequency. */
+ u32 cz_freq;
u32 ei_interrupt_count;