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author | Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> | 2016-04-27 15:44:21 +0300 |
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committer | Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> | 2016-04-29 09:57:20 +0300 |
commit | 204970b5cf8a3d3367b346df0ec6f56279ad8fca (patch) | |
tree | 451d3a9120cbb047bbcf79215390eb50d24ea417 /drivers/gpu/drm/i915/i915_drv.h | |
parent | e7d2a7172426f3feecb5f13f47acde1c11e31985 (diff) | |
download | lwn-204970b5cf8a3d3367b346df0ec6f56279ad8fca.tar.gz lwn-204970b5cf8a3d3367b346df0ec6f56279ad8fca.zip |
drm/i915: Unduplicate CHV encoders' post pll disable code
The exact same code was used by HDMI and DP encoders, so move it to
intel_dpio_phy.c.
v2: Fix typo in the commit message. (Jim Bride)
v3: Call the new function chv_phy_post_pll_disable() instead of
chv_phy_post_disable(), as it should be called after the pll
is disabled. (Ville)
Cc: Jim Bride <jim.bride@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Jim Bride <jim.bride@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1461761065-21195-7-git-send-email-ander.conselvan.de.oliveira@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 01c45c91e059..2f4fe7ef1a26 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3598,6 +3598,7 @@ void chv_data_lane_soft_reset(struct intel_encoder *encoder, void chv_phy_pre_pll_enable(struct intel_encoder *encoder); void chv_phy_pre_encoder_enable(struct intel_encoder *encoder); void chv_phy_release_cl2_override(struct intel_encoder *encoder); +void chv_phy_post_pll_disable(struct intel_encoder *encoder); int intel_gpu_freq(struct drm_i915_private *dev_priv, int val); int intel_freq_opcode(struct drm_i915_private *dev_priv, int val); |