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| author | Zou Nan hai <nanhai.zou@intel.com> | 2010-06-25 13:40:24 +0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-08-09 11:28:03 -0700 |
| commit | 1cafd34731cd14e5a72edaf0f41717c8126cfce9 (patch) | |
| tree | 1219b47cb285aeae7cbbf1baa7bdd7918b9c4fde /drivers/gpu/drm/i915/i915_dma.c | |
| parent | e78d73b16bcde921c9cf458d2e4de8e4fc2518f3 (diff) | |
| download | lwn-1cafd34731cd14e5a72edaf0f41717c8126cfce9.tar.gz lwn-1cafd34731cd14e5a72edaf0f41717c8126cfce9.zip | |
drm/i915 invalidate indirect state pointers at end of ring exec
This is required by the spec, and without this some 3D programs will
hang after resume from RC6 we enable that.
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_dma.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_dma.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index f19ffe87af3c..44af317731b6 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -499,6 +499,13 @@ static int i915_dispatch_batchbuffer(struct drm_device * dev, } } + + if (IS_G4X(dev) || IS_IRONLAKE(dev)) { + BEGIN_LP_RING(2); + OUT_RING(MI_FLUSH | MI_NO_WRITE_FLUSH | MI_INVALIDATE_ISP); + OUT_RING(MI_NOOP); + ADVANCE_LP_RING(); + } i915_emit_breadcrumb(dev); return 0; |