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authorDaniel Vetter <daniel.vetter@ffwll.ch>2014-07-11 10:30:17 -0700
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-07-23 07:05:20 +0200
commitfa128fa647b81734ff83c3c5ee0d60ebf69e6ee5 (patch)
tree9c5994830f53265fb55a9a089c8b4c4a61fd630a /drivers/gpu/drm/i915/i915_debugfs.c
parent9ca153017e00550dbeda2718cfd69ca37de9c523 (diff)
downloadlwn-fa128fa647b81734ff83c3c5ee0d60ebf69e6ee5.tar.gz
lwn-fa128fa647b81734ff83c3c5ee0d60ebf69e6ee5.zip
drm/i915: Improve PSR debugfs output
Add busy_frontbuffer_bits and locking. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_debugfs.c')
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 62ea6198a092..fc39610fe12d 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1892,10 +1892,15 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
intel_runtime_pm_get(dev_priv);
+ mutex_lock(&dev_priv->psr.lock);
seq_printf(m, "Sink_Support: %s\n", yesno(dev_priv->psr.sink_support));
seq_printf(m, "Source_OK: %s\n", yesno(dev_priv->psr.source_ok));
seq_printf(m, "Enabled: %s\n", yesno((bool)dev_priv->psr.enabled));
seq_printf(m, "Active: %s\n", yesno(dev_priv->psr.active));
+ seq_printf(m, "Busy frontbuffer bits: 0x%03x\n",
+ dev_priv->psr.busy_frontbuffer_bits);
+ seq_printf(m, "Re-enable work scheduled: %s\n",
+ yesno(work_busy(&dev_priv->psr.work.work)));
enabled = HAS_PSR(dev) &&
I915_READ(EDP_PSR_CTL(dev)) & EDP_PSR_ENABLE;
@@ -1905,6 +1910,7 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
psrperf = I915_READ(EDP_PSR_PERF_CNT(dev)) &
EDP_PSR_PERF_CNT_MASK;
seq_printf(m, "Performance_Counter: %u\n", psrperf);
+ mutex_unlock(&dev_priv->psr.lock);
intel_runtime_pm_put(dev_priv);
return 0;