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authorAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>2014-10-29 11:32:31 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-11-07 18:41:42 +0100
commit1e6f2ddc88fec990ef4fb1aa3b7cb9941df0321b (patch)
tree473b05b221f28aacf7325485922ecc7e7346b576 /drivers/gpu/drm/i915/i915_debugfs.c
parent0a88818d093b4d5746d7b3af3acc2b2bddd59808 (diff)
downloadlwn-1e6f2ddc88fec990ef4fb1aa3b7cb9941df0321b.tar.gz
lwn-1e6f2ddc88fec990ef4fb1aa3b7cb9941df0321b.zip
drm/i915: Convert shared dpll reference count to a crtc mask
This will be used in a follow up patch to properly release shared DPLLs without relying on the shared_dpll field in pipe_config. v2: Fix white space error (Ville) Use hweight32() (Ville) Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_debugfs.c')
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index a79f83ce9c84..ce32ae788c3c 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2630,8 +2630,8 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused)
struct intel_shared_dpll *pll = &dev_priv->shared_dplls[i];
seq_printf(m, "DPLL%i: %s, id: %i\n", i, pll->name, pll->id);
- seq_printf(m, " refcount: %i, active: %i, on: %s\n", pll->refcount,
- pll->active, yesno(pll->on));
+ seq_printf(m, " crtc_mask: 0x%08x, active: %d, on: %s\n",
+ pll->crtc_mask, pll->active, yesno(pll->on));
seq_printf(m, " tracked hardware state:\n");
seq_printf(m, " dpll: 0x%08x\n", pll->hw_state.dpll);
seq_printf(m, " dpll_md: 0x%08x\n", pll->hw_state.dpll_md);