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authorStefan Agner <stefan@agner.ch>2016-03-22 15:45:29 -0700
committerStefan Agner <stefan@agner.ch>2016-04-25 20:27:18 -0700
commitf93500f430733178dfd8f9c80e52b13d0f273dd3 (patch)
tree8bedc70a345953ae14aeb90647790df7b7cab5b0 /drivers/gpu/drm/fsl-dcu
parent73fa30337a936695eeebecfa2c48ff567361c793 (diff)
downloadlwn-f93500f430733178dfd8f9c80e52b13d0f273dd3.tar.gz
lwn-f93500f430733178dfd8f9c80e52b13d0f273dd3.zip
drm/fsl-dcu: add extra clock for pixel clock
The Vybrid DCU variant has two independent clock inputs, one for the registers (IPG bus clock) and one for the pixel clock. Support this distinction in the DCU DRM driver while staying backward compatible for old device trees. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stefan Agner <stefan@agner.ch>
Diffstat (limited to 'drivers/gpu/drm/fsl-dcu')
-rw-r--r--drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c2
-rw-r--r--drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c16
-rw-r--r--drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h1
3 files changed, 17 insertions, 2 deletions
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
index 4ed7798533f9..87d85faaac6a 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
@@ -71,7 +71,7 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
unsigned long dcuclk;
index = drm_crtc_index(crtc);
- dcuclk = clk_get_rate(fsl_dev->clk);
+ dcuclk = clk_get_rate(fsl_dev->pix_clk);
div = dcuclk / mode->clock / 1000;
/* Configure timings: */
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
index f2a9c1bb32c0..f80c116018b5 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
@@ -331,10 +331,21 @@ static int fsl_dcu_drm_probe(struct platform_device *pdev)
return ret;
}
+ fsl_dev->pix_clk = devm_clk_get(dev, "pix");
+ if (IS_ERR(fsl_dev->pix_clk)) {
+ /* legancy binding, use dcu clock as pixel clock */
+ fsl_dev->pix_clk = fsl_dev->clk;
+ }
+ ret = clk_prepare_enable(fsl_dev->pix_clk);
+ if (ret < 0) {
+ dev_err(dev, "failed to enable pix clk\n");
+ goto disable_clk;
+ }
+
drm = drm_dev_alloc(driver, dev);
if (!drm) {
ret = -ENOMEM;
- goto disable_clk;
+ goto disable_pix_clk;
}
fsl_dev->dev = dev;
@@ -355,6 +366,8 @@ static int fsl_dcu_drm_probe(struct platform_device *pdev)
unref:
drm_dev_unref(drm);
+disable_pix_clk:
+ clk_disable_unprepare(fsl_dev->pix_clk);
disable_clk:
clk_disable_unprepare(fsl_dev->clk);
return ret;
@@ -365,6 +378,7 @@ static int fsl_dcu_drm_remove(struct platform_device *pdev)
struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);
clk_disable_unprepare(fsl_dev->clk);
+ clk_disable_unprepare(fsl_dev->pix_clk);
drm_put_dev(fsl_dev->drm);
return 0;
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
index 6413ac9e4769..edb210277771 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
@@ -183,6 +183,7 @@ struct fsl_dcu_drm_device {
struct regmap *regmap;
int irq;
struct clk *clk;
+ struct clk *pix_clk;
/*protects hardware register*/
spinlock_t irq_lock;
struct drm_device *drm;