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| author | Swapnil Jakhade <sjakhade@cadence.com> | 2020-09-18 14:09:22 +0200 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2020-09-18 15:16:01 +0300 |
| commit | fb43aa0acdfd600c75b8c877bdf9f6e9893ffc9b (patch) | |
| tree | e1ac6036688d8f369a8a75373b7b4c0ab72a38f5 /drivers/gpu/drm/bridge/Makefile | |
| parent | 85649cc8dc509dfb97f5ac87f7efefe03539323a (diff) | |
| download | lwn-fb43aa0acdfd600c75b8c877bdf9f6e9893ffc9b.tar.gz lwn-fb43aa0acdfd600c75b8c877bdf9f6e9893ffc9b.zip | |
drm: bridge: Add support for Cadence MHDP8546 DPI/DP bridge
Add a new DRM bridge driver for Cadence MHDP8546 DPTX IP used in TI J721E
SoC. MHDP DPTX IP is the component that complies with VESA DisplayPort (DP)
and embedded Display Port (eDP) standards. It integrates uCPU running the
embedded Firmware (FW) interfaced over APB interface.
Basically, it takes a DPI stream as input and outputs it encoded in DP
format. Currently, it supports only SST mode.
Co-developed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Co-developed-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu/drm/bridge/Makefile')
| -rw-r--r-- | drivers/gpu/drm/bridge/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index c589a6a7cbe1..2b3aff104e46 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -25,4 +25,5 @@ obj-$(CONFIG_DRM_TI_TPD12S015) += ti-tpd12s015.o obj-$(CONFIG_DRM_NWL_MIPI_DSI) += nwl-dsi.o obj-y += analogix/ +obj-y += cadence/ obj-y += synopsys/ |