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author | Le Ma <le.ma@amd.com> | 2019-05-20 17:04:05 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-07-18 14:18:05 -0500 |
commit | 5fb7c66508223d62238b5c3574f0ca36effa52af (patch) | |
tree | 283d4bf1391da39932f4e14da579c94d49058310 /drivers/gpu/drm/amd/amdgpu/soc15.c | |
parent | 7d0670f44199f8f38227726843952b7eb3e407ab (diff) | |
download | lwn-5fb7c66508223d62238b5c3574f0ca36effa52af.tar.gz lwn-5fb7c66508223d62238b5c3574f0ca36effa52af.zip |
drm/amdgpu: correct ip for mmHDP_READ_CACHE_INVALIDATE register access
Use the proper IP index for HDP registers.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/soc15.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index 232adf83a7bf..a076001b326d 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.c +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c @@ -703,7 +703,7 @@ static void soc15_invalidate_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring) { if (!ring || !ring->funcs->emit_wreg) - WREG32_SOC15_NO_KIQ(NBIO, 0, mmHDP_READ_CACHE_INVALIDATE, 1); + WREG32_SOC15_NO_KIQ(HDP, 0, mmHDP_READ_CACHE_INVALIDATE, 1); else amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET( HDP, 0, mmHDP_READ_CACHE_INVALIDATE), 1); |