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authorXiangliang Yu <Xiangliang.Yu@amd.com>2017-04-21 14:06:09 +0800
committerAlex Deucher <alexander.deucher@amd.com>2017-05-24 17:40:04 -0400
commitab276632ec62064fb94dbbd441a94062e8bcd37a (patch)
tree89ec70b688635991ba0f1a573ed76560493c0727 /drivers/gpu/drm/amd/amdgpu/soc15.c
parent213cacefcd5c7815802281445ba503d26e794b77 (diff)
downloadlwn-ab276632ec62064fb94dbbd441a94062e8bcd37a.tar.gz
lwn-ab276632ec62064fb94dbbd441a94062e8bcd37a.zip
drm/amdgpu/virt: change the place of virt_init_setting
Change place of virt_init_setting function so that can cover the cg and pg flags configuration. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/soc15.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/soc15.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 83ef7987660e..20a262fabc28 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -531,11 +531,6 @@ static int soc15_common_early_init(void *handle)
(amdgpu_ip_block_mask & (1 << AMD_IP_BLOCK_TYPE_PSP)))
psp_enabled = true;
- if (amdgpu_sriov_vf(adev)) {
- amdgpu_virt_init_setting(adev);
- xgpu_ai_mailbox_set_irq_funcs(adev);
- }
-
/*
* nbio need be used for both sdma and gfx9, but only
* initializes once
@@ -579,6 +574,11 @@ static int soc15_common_early_init(void *handle)
return -EINVAL;
}
+ if (amdgpu_sriov_vf(adev)) {
+ amdgpu_virt_init_setting(adev);
+ xgpu_ai_mailbox_set_irq_funcs(adev);
+ }
+
adev->firmware.load_type = amdgpu_ucode_get_load_type(adev, amdgpu_fw_load_type);
amdgpu_get_pcie_info(adev);