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authorLinus Torvalds <torvalds@linux-foundation.org>2021-09-28 16:10:42 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2021-09-28 16:10:42 -0700
commita4e6f95a891ac08bd09d62e3e6dae239b150f4c1 (patch)
tree76807e4a2e31cc5ad85b7c3d487cf586cf23ae22 /drivers/gpio
parent62da74a735702e62ca910d41b4bb760bbd968e3a (diff)
parent28406a21999152ff7faa30b194f734565bdd8e0d (diff)
downloadlwn-a4e6f95a891ac08bd09d62e3e6dae239b150f4c1.tar.gz
lwn-a4e6f95a891ac08bd09d62e3e6dae239b150f4c1.zip
Merge tag 'pinctrl-v5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control fixes from Linus Walleij: "Some few pin control fixes for the v5.15 kernel cycle. The most critical is the AMD fixes. - Fix wakeup interrupts in the AMD driver affecting AMD laptops. - Fix parent irqspec translation in the Qualcomm SPMI GPIO driver. - Fix deferred probe handling in the Rockchip driver, this is a stopgap solution while we look for something more elegant. - Add PM suspend callbacks to the Qualcomm SC7280 driver. - Some minor doc fix (should have come in earlier, sorry)" * tag 'pinctrl-v5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: qcom: sc7280: Add PM suspend callbacks gpio/rockchip: fetch deferred output settings on probe pinctrl/rockchip: add a queue for deferred pin output settings on probe pinctrl: qcom: spmi-gpio: correct parent irqspec translation pinctrl: amd: Handle wake-up interrupt pinctrl: amd: Add irq field data pinctrl: core: Remove duplicated word from devm_pinctrl_unregister()
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-rockchip.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c
index 3335bd57761d..ce63cbd14d69 100644
--- a/drivers/gpio/gpio-rockchip.c
+++ b/drivers/gpio/gpio-rockchip.c
@@ -689,6 +689,7 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
struct device_node *pctlnp = of_get_parent(np);
struct pinctrl_dev *pctldev = NULL;
struct rockchip_pin_bank *bank = NULL;
+ struct rockchip_pin_output_deferred *cfg;
static int gpio;
int id, ret;
@@ -716,12 +717,33 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
if (ret)
return ret;
+ /*
+ * Prevent clashes with a deferred output setting
+ * being added right at this moment.
+ */
+ mutex_lock(&bank->deferred_lock);
+
ret = rockchip_gpiolib_register(bank);
if (ret) {
clk_disable_unprepare(bank->clk);
+ mutex_unlock(&bank->deferred_lock);
return ret;
}
+ while (!list_empty(&bank->deferred_output)) {
+ cfg = list_first_entry(&bank->deferred_output,
+ struct rockchip_pin_output_deferred, head);
+ list_del(&cfg->head);
+
+ ret = rockchip_gpio_direction_output(&bank->gpio_chip, cfg->pin, cfg->arg);
+ if (ret)
+ dev_warn(dev, "setting output pin %u to %u failed\n", cfg->pin, cfg->arg);
+
+ kfree(cfg);
+ }
+
+ mutex_unlock(&bank->deferred_lock);
+
platform_set_drvdata(pdev, bank);
dev_info(dev, "probed %pOF\n", np);