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authorAlan Tull <atull@kernel.org>2017-11-15 14:20:24 -0600
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-11-28 16:30:38 +0100
commit503d4b7a446b3838785fa7f21e339941a5d1c2d5 (patch)
tree7647ec3740241624156eaa4f22b7e4b90ab39ecf /drivers/fpga
parent52a3a7ccce07e73323fc1bae9eb0b0b63375391c (diff)
downloadlwn-503d4b7a446b3838785fa7f21e339941a5d1c2d5.tar.gz
lwn-503d4b7a446b3838785fa7f21e339941a5d1c2d5.zip
fpga: region: add fpga_region_class_find
Add a function for searching the fpga-region class. This will be useful when device tree code is no longer in the same file that declares the fpga-region class. Another step in separating common FPGA region code from device tree support. Signed-off-by: Alan Tull <atull@kernel.org> Acked-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/fpga')
-rw-r--r--drivers/fpga/fpga-region.c23
1 files changed, 15 insertions, 8 deletions
diff --git a/drivers/fpga/fpga-region.c b/drivers/fpga/fpga-region.c
index 76db81de2cc0..5c0869576cd1 100644
--- a/drivers/fpga/fpga-region.c
+++ b/drivers/fpga/fpga-region.c
@@ -30,6 +30,20 @@
static DEFINE_IDA(fpga_region_ida);
static struct class *fpga_region_class;
+struct fpga_region *fpga_region_class_find(
+ struct device *start, const void *data,
+ int (*match)(struct device *, const void *))
+{
+ struct device *dev;
+
+ dev = class_find_device(fpga_region_class, start, data, match);
+ if (!dev)
+ return NULL;
+
+ return to_fpga_region(dev);
+}
+EXPORT_SYMBOL_GPL(fpga_region_class_find);
+
static const struct of_device_id fpga_region_of_match[] = {
{ .compatible = "fpga-region", },
{},
@@ -51,14 +65,7 @@ static int fpga_region_of_node_match(struct device *dev, const void *data)
*/
static struct fpga_region *of_fpga_region_find(struct device_node *np)
{
- struct device *dev;
-
- dev = class_find_device(fpga_region_class, NULL, np,
- fpga_region_of_node_match);
- if (!dev)
- return NULL;
-
- return to_fpga_region(dev);
+ return fpga_region_class_find(NULL, np, fpga_region_of_node_match);
}
/**