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| author | Aristeu Rozanski <aris@redhat.com> | 2014-06-18 11:05:01 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <m.chehab@samsung.com> | 2014-06-26 15:46:55 -0300 |
| commit | 7b8278358cc2b453ca6e75eedb3741cdb7e97236 (patch) | |
| tree | d6bc903a68f1695da152cf31a8a7a70b9d51e490 /drivers/edac | |
| parent | adc61bcd91aa8364efaa496e7a4699950c362c21 (diff) | |
| download | lwn-7b8278358cc2b453ca6e75eedb3741cdb7e97236.tar.gz lwn-7b8278358cc2b453ca6e75eedb3741cdb7e97236.zip | |
edac: add DDR4 and RDDR4
Haswell memory controller can make use of DDR4 and Registered DDR4
Cc: tony.luck@intel.com
Signed-off-by: Aristeu Rozanski <aris@redhat.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'drivers/edac')
| -rw-r--r-- | drivers/edac/edac_mc_sysfs.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c index 01fae8289cf0..a6cd36100663 100644 --- a/drivers/edac/edac_mc_sysfs.c +++ b/drivers/edac/edac_mc_sysfs.c @@ -108,7 +108,9 @@ static const char * const mem_types[] = { [MEM_RDDR2] = "Registered-DDR2", [MEM_XDR] = "XDR", [MEM_DDR3] = "Unbuffered-DDR3", - [MEM_RDDR3] = "Registered-DDR3" + [MEM_RDDR3] = "Registered-DDR3", + [MEM_DDR4] = "Unbuffered-DDR4", + [MEM_RDDR4] = "Registered-DDR4" }; static const char * const dev_types[] = { |