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author | David Woodhouse <David.Woodhouse@intel.com> | 2012-08-22 12:54:55 +0100 |
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committer | David Woodhouse <David.Woodhouse@intel.com> | 2012-08-22 12:55:43 +0100 |
commit | 2361f738b67ab7f1152187fa3d321a09b7c95c09 (patch) | |
tree | eddf2b958215b668b9b871b6b59bc76c67a47751 /drivers/dma/sh/shdma.h | |
parent | 4800399e335658aae632f587f6759a860f584804 (diff) | |
parent | d9875690d9b89a866022ff49e3fcea892345ad92 (diff) | |
download | lwn-2361f738b67ab7f1152187fa3d321a09b7c95c09.tar.gz lwn-2361f738b67ab7f1152187fa3d321a09b7c95c09.zip |
Merge tag 'v3.6-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux
Having missed the merge window, update to 3.6-rc2 to avoid conflicts with
new patches.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/dma/sh/shdma.h')
-rw-r--r-- | drivers/dma/sh/shdma.h | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/drivers/dma/sh/shdma.h b/drivers/dma/sh/shdma.h new file mode 100644 index 000000000000..9314e93225db --- /dev/null +++ b/drivers/dma/sh/shdma.h @@ -0,0 +1,64 @@ +/* + * Renesas SuperH DMA Engine support + * + * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> + * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved. + * + * This is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ +#ifndef __DMA_SHDMA_H +#define __DMA_SHDMA_H + +#include <linux/sh_dma.h> +#include <linux/shdma-base.h> +#include <linux/dmaengine.h> +#include <linux/interrupt.h> +#include <linux/list.h> + +#define SH_DMAE_MAX_CHANNELS 20 +#define SH_DMAE_TCR_MAX 0x00FFFFFF /* 16MB */ + +struct device; + +struct sh_dmae_chan { + struct shdma_chan shdma_chan; + const struct sh_dmae_slave_config *config; /* Slave DMA configuration */ + int xmit_shift; /* log_2(bytes_per_xfer) */ + u32 __iomem *base; + char dev_id[16]; /* unique name per DMAC of channel */ + int pm_error; +}; + +struct sh_dmae_device { + struct shdma_dev shdma_dev; + struct sh_dmae_chan *chan[SH_DMAE_MAX_CHANNELS]; + struct sh_dmae_pdata *pdata; + struct list_head node; + u32 __iomem *chan_reg; + u16 __iomem *dmars; + unsigned int chcr_offset; + u32 chcr_ie_bit; +}; + +struct sh_dmae_regs { + u32 sar; /* SAR / source address */ + u32 dar; /* DAR / destination address */ + u32 tcr; /* TCR / transfer count */ +}; + +struct sh_dmae_desc { + struct sh_dmae_regs hw; + struct shdma_desc shdma_desc; +}; + +#define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, shdma_chan) +#define to_sh_desc(lh) container_of(lh, struct sh_desc, node) +#define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx) +#define to_sh_dev(chan) container_of(chan->shdma_chan.dma_chan.device,\ + struct sh_dmae_device, shdma_dev.dma_dev) + +#endif /* __DMA_SHDMA_H */ |