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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2015-09-28 18:57:03 +0300 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2015-09-30 13:42:02 +0530 |
| commit | 6bea0f6d1c47b07be88dfd93f013ae05fcb3d8bf (patch) | |
| tree | 101b7803013771335da6245edffd0152d5b0ac81 /drivers/dma/at_xdmac.c | |
| parent | ee08b59d47d859ed0a11ab331a3fbc5ab3b56100 (diff) | |
| download | lwn-6bea0f6d1c47b07be88dfd93f013ae05fcb3d8bf.tar.gz lwn-6bea0f6d1c47b07be88dfd93f013ae05fcb3d8bf.zip | |
dmaengine: dw: properly read DWC_PARAMS register
In case we have less than maximum allowed channels (8) and autoconfiguration is
enabled the DWC_PARAMS read is wrong because it uses different arithmetic to
what is needed for channel priority setup.
Re-do the caclulations properly. This now works on AVR32 board well.
Fixes: fed2574b3c9f (dw_dmac: introduce software emulation of LLP transfers)
Cc: yitian.bu@tangramtek.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/at_xdmac.c')
0 files changed, 0 insertions, 0 deletions