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| author | Geert Uytterhoeven <geert@linux-m68k.org> | 2022-06-16 16:13:12 +0200 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2022-06-16 08:41:43 -0700 |
| commit | ce4b461ba2c1247e0508995ff250f156b5310441 (patch) | |
| tree | 4657abf3e6773d5e4309a42dc6cc50f56bdfa0f6 /drivers/dma/apple-admac.c | |
| parent | 81ce6f3dbbdce2785bba6e0b3c540793725c218d (diff) | |
| download | lwn-ce4b461ba2c1247e0508995ff250f156b5310441.tar.gz lwn-ce4b461ba2c1247e0508995ff250f156b5310441.zip | |
dmaengine: apple-admac: Use {low,upp}er_32_bits() to split 64-bit address
If CONFIG_PHYS_ADDR_T_64BIT is not set:
drivers/dma/apple-admac.c: In function ‘admac_cyclic_write_one_desc’:
drivers/dma/apple-admac.c:213:22: error: right shift count >= width of type [-Werror=shift-count-overflow]
213 | writel_relaxed(addr >> 32, ad->base + REG_DESC_WRITE(channo));
| ^~
Fix this by using the {low,upp}er_32_bits() helper macros to obtain the
address parts.
Reported-by: noreply@ellerman.id.au
Fixes: b127315d9a78c011 ("dmaengine: apple-admac: Add Apple ADMAC driver")
Acked-by: Martin Povišer <povik+lin@cutebit.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Link: https://lore.kernel.org/r/20220616141312.1953819-1-geert@linux-m68k.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/apple-admac.c')
| -rw-r--r-- | drivers/dma/apple-admac.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/dma/apple-admac.c b/drivers/dma/apple-admac.c index c502f8c3aca7..d1f74a3aa999 100644 --- a/drivers/dma/apple-admac.c +++ b/drivers/dma/apple-admac.c @@ -209,10 +209,10 @@ static void admac_cyclic_write_one_desc(struct admac_data *ad, int channo, dev_dbg(ad->dev, "ch%d descriptor: addr=0x%pad len=0x%zx flags=0x%lx\n", channo, &addr, tx->period_len, FLAG_DESC_NOTIFY); - writel_relaxed(addr, ad->base + REG_DESC_WRITE(channo)); - writel_relaxed(addr >> 32, ad->base + REG_DESC_WRITE(channo)); - writel_relaxed(tx->period_len, ad->base + REG_DESC_WRITE(channo)); - writel_relaxed(FLAG_DESC_NOTIFY, ad->base + REG_DESC_WRITE(channo)); + writel_relaxed(lower_32_bits(addr), ad->base + REG_DESC_WRITE(channo)); + writel_relaxed(upper_32_bits(addr), ad->base + REG_DESC_WRITE(channo)); + writel_relaxed(tx->period_len, ad->base + REG_DESC_WRITE(channo)); + writel_relaxed(FLAG_DESC_NOTIFY, ad->base + REG_DESC_WRITE(channo)); tx->submitted_pos += tx->period_len; tx->submitted_pos %= 2 * tx->buf_len; |