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author | Dan Williams <dan.j.williams@intel.com> | 2021-10-15 14:57:27 -0700 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2021-10-29 11:53:51 -0700 |
commit | a261e9a1576ab32966be907e73786282d52afb61 (patch) | |
tree | 923f5efb64eae2082e037930175239579f109215 /drivers/cxl | |
parent | 7dc7a64de2bb3daf613f4c2e809e49678c579148 (diff) | |
download | lwn-a261e9a1576ab32966be907e73786282d52afb61.tar.gz lwn-a261e9a1576ab32966be907e73786282d52afb61.zip |
cxl/pci: Add @base to cxl_register_map
In addition to carrying @barno, @block_offset, and @reg_type, add @base
to keep all map/unmap parameters in one object. The helpers
cxl_{map,unmap}_regblock() handle adjusting @base to the @block_offset
at map and unmap time.
Document that @base incorporates @block_offset so that downstream
consumers of a mapped cxl_register_map instance do not need perform any
fixups / can use @base directly.
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/163433497228.889435.11271988238496181536.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl')
-rw-r--r-- | drivers/cxl/cxl.h | 10 | ||||
-rw-r--r-- | drivers/cxl/pci.c | 31 |
2 files changed, 26 insertions, 15 deletions
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index a6687e7fd598..5e2e93451928 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -139,7 +139,17 @@ struct cxl_device_reg_map { struct cxl_reg_map memdev; }; +/** + * struct cxl_register_map - DVSEC harvested register block mapping parameters + * @base: virtual base of the register-block-BAR + @block_offset + * @block_offset: offset to start of register block in @barno + * @reg_type: see enum cxl_regloc_type + * @barno: PCI BAR number containing the register block + * @component_map: cxl_reg_map for component registers + * @device_map: cxl_reg_maps for device registers + */ struct cxl_register_map { + void __iomem *base; u64 block_offset; u8 reg_type; u8 barno; diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index eb0c2f1b9e65..7d5e5548b316 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -306,8 +306,7 @@ static int cxl_pci_setup_mailbox(struct cxl_mem *cxlm) return 0; } -static void __iomem *cxl_pci_map_regblock(struct pci_dev *pdev, - struct cxl_register_map *map) +static int cxl_map_regblock(struct pci_dev *pdev, struct cxl_register_map *map) { void __iomem *addr; int bar = map->barno; @@ -318,24 +317,27 @@ static void __iomem *cxl_pci_map_regblock(struct pci_dev *pdev, if (pci_resource_len(pdev, bar) < offset) { dev_err(dev, "BAR%d: %pr: too small (offset: %pa)\n", bar, &pdev->resource[bar], &offset); - return NULL; + return -ENXIO; } addr = pci_iomap(pdev, bar, 0); if (!addr) { dev_err(dev, "failed to map registers\n"); - return addr; + return -ENOMEM; } dev_dbg(dev, "Mapped CXL Memory Device resource bar %u @ %pa\n", bar, &offset); - return addr; + map->base = addr + map->block_offset; + return 0; } -static void cxl_pci_unmap_regblock(struct pci_dev *pdev, void __iomem *base) +static void cxl_unmap_regblock(struct pci_dev *pdev, + struct cxl_register_map *map) { - pci_iounmap(pdev, base); + pci_iounmap(pdev, map->base - map->block_offset); + map->base = NULL; } static int cxl_pci_dvsec(struct pci_dev *pdev, int dvsec) @@ -361,12 +363,12 @@ static int cxl_pci_dvsec(struct pci_dev *pdev, int dvsec) return 0; } -static int cxl_probe_regs(struct pci_dev *pdev, void __iomem *base, - struct cxl_register_map *map) +static int cxl_probe_regs(struct pci_dev *pdev, struct cxl_register_map *map) { struct cxl_component_reg_map *comp_map; struct cxl_device_reg_map *dev_map; struct device *dev = &pdev->dev; + void __iomem *base = map->base; switch (map->reg_type) { case CXL_REGLOC_RBI_COMPONENT: @@ -442,7 +444,6 @@ static void cxl_decode_regblock(u32 reg_lo, u32 reg_hi, */ static int cxl_pci_setup_regs(struct cxl_mem *cxlm) { - void __iomem *base; u32 regloc_size, regblocks; int regloc, i, n_maps, ret = 0; struct device *dev = cxlm->dev; @@ -475,12 +476,12 @@ static int cxl_pci_setup_regs(struct cxl_mem *cxlm) if (map->reg_type > CXL_REGLOC_RBI_MEMDEV) continue; - base = cxl_pci_map_regblock(pdev, map); - if (!base) - return -ENOMEM; + ret = cxl_map_regblock(pdev, map); + if (ret) + return ret; - ret = cxl_probe_regs(pdev, base + map->block_offset, map); - cxl_pci_unmap_regblock(pdev, base); + ret = cxl_probe_regs(pdev, map); + cxl_unmap_regblock(pdev, map); if (ret) return ret; |