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| author | Dan Carpenter <dan.carpenter@linaro.org> | 2023-10-31 12:53:52 +0300 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-10-31 14:09:50 -0700 |
| commit | 69d56b15a7941680aba8c3175b165221ecdf54b6 (patch) | |
| tree | fa329de08f46f405928309f0b06e015fd800efd5 /drivers/cxl | |
| parent | b3cfdbf6a062bcfb431153f92d6bc1ad20bfc687 (diff) | |
| download | lwn-69d56b15a7941680aba8c3175b165221ecdf54b6.tar.gz lwn-69d56b15a7941680aba8c3175b165221ecdf54b6.zip | |
cxl/hdm: Fix && vs || bug
If "info" is NULL then this code will crash. || was intended instead of
&&.
Fixes: 8ce520fdea24 ("cxl/hdm: Use stored Component Register mappings to map HDM decoder capability")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Robert Richter <rrichter@amd.com>
Link: https://lore.kernel.org/r/60028378-d3d5-4d6d-90fd-f915f061e731@moroto.mountain
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl')
| -rw-r--r-- | drivers/cxl/core/hdm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c index bc8ad4a8afca..af17da8230d5 100644 --- a/drivers/cxl/core/hdm.c +++ b/drivers/cxl/core/hdm.c @@ -146,7 +146,7 @@ struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port, /* Memory devices can configure device HDM using DVSEC range regs. */ if (reg_map->resource == CXL_RESOURCE_NONE) { - if (!info && !info->mem_enabled) { + if (!info || !info->mem_enabled) { dev_err(dev, "No component registers mapped\n"); return ERR_PTR(-ENXIO); } |