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| author | Dave Jiang <dave.jiang@intel.com> | 2023-02-14 11:41:24 -0800 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-02-14 15:45:21 -0800 |
| commit | b777e9bec960a29374dc486d47784c73b7ac4cef (patch) | |
| tree | 0d44be3bf53ba1d04929297e5955f380c26c59f6 /drivers/cxl/port.c | |
| parent | 9de321e93c3b3fd7fd2621a2557c42fa7d43e314 (diff) | |
| download | lwn-b777e9bec960a29374dc486d47784c73b7ac4cef.tar.gz lwn-b777e9bec960a29374dc486d47784c73b7ac4cef.zip | |
cxl/hdm: Emulate HDM decoder from DVSEC range registers
In the case where HDM decoder register block exists but is not programmed
and at the same time the DVSEC range register range is active, populate the
CXL decoder object 'cxl_decoder' with info from DVSEC range registers.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/167640368454.935665.13806415120298330717.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl/port.c')
| -rw-r--r-- | drivers/cxl/port.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c index 9e09728b20d9..d3a708e32565 100644 --- a/drivers/cxl/port.c +++ b/drivers/cxl/port.c @@ -78,7 +78,7 @@ static int cxl_port_probe(struct device *dev) } } - rc = devm_cxl_enumerate_decoders(cxlhdm); + rc = devm_cxl_enumerate_decoders(cxlhdm, &info); if (rc) { dev_err(dev, "Couldn't enumerate decoders (%d)\n", rc); return rc; |