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author | Dave Jiang <dave.jiang@intel.com> | 2023-02-14 11:41:13 -0800 |
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committer | Dan Williams <dan.j.williams@intel.com> | 2023-02-14 15:45:21 -0800 |
commit | 59c3368b2e69eb7da7f271286a0bd80930dfc070 (patch) | |
tree | d03c6a3598966ac12659a378fce0253890b8015c /drivers/cxl/cxlmem.h | |
parent | 1acba6e9206c655f8eb6736c7cafbf022492f36d (diff) | |
download | lwn-59c3368b2e69eb7da7f271286a0bd80930dfc070.tar.gz lwn-59c3368b2e69eb7da7f271286a0bd80930dfc070.zip |
cxl/port: Export cxl_dvsec_rr_decode() to cxl_port
Call cxl_dvsec_rr_decode() in the beginning of cxl_port_probe() and
preserve the decoded information in a local
'struct cxl_endpoint_dvsec_info'. This info can be passed to various
functions later on in order to support the HDM decoder emulation.
The invocation of cxl_dvsec_rr_decode() in cxl_hdm_decode_init() is
removed and a pointer to the 'struct cxl_endpoint_dvsec_info' is passed
in.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/167640367377.935665.2848747799651019676.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl/cxlmem.h')
-rw-r--r-- | drivers/cxl/cxlmem.h | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h index ab138004f644..187a310780a9 100644 --- a/drivers/cxl/cxlmem.h +++ b/drivers/cxl/cxlmem.h @@ -182,18 +182,6 @@ static inline int cxl_mbox_cmd_rc2errno(struct cxl_mbox_cmd *mbox_cmd) #define CXL_CAPACITY_MULTIPLIER SZ_256M /** - * struct cxl_endpoint_dvsec_info - Cached DVSEC info - * @mem_enabled: cached value of mem_enabled in the DVSEC, PCIE_DEVICE - * @ranges: Number of active HDM ranges this device uses. - * @dvsec_range: cached attributes of the ranges in the DVSEC, PCIE_DEVICE - */ -struct cxl_endpoint_dvsec_info { - bool mem_enabled; - int ranges; - struct range dvsec_range[2]; -}; - -/** * struct cxl_dev_state - The driver device state * * cxl_dev_state represents the CXL driver/device state. It provides an |