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| author | Dave Jiang <dave.jiang@intel.com> | 2022-11-30 12:22:32 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2022-12-01 12:42:35 -0800 |
| commit | 3b502e886d01c2f96b2774176be4c7bceef2516b (patch) | |
| tree | 3b4543e7f3e5a772644e52e0948423a4147cae97 /drivers/cxl/core | |
| parent | 8e80b18664934621c742f17cdac3c4fe00728612 (diff) | |
| download | lwn-3b502e886d01c2f96b2774176be4c7bceef2516b.tar.gz lwn-3b502e886d01c2f96b2774176be4c7bceef2516b.zip | |
cxl/pmem: Add "Passphrase Secure Erase" security command support
Create callback function to support the nvdimm_security_ops() ->erase()
callback. Translate the operation to send "Passphrase Secure Erase"
security command for CXL memory device.
When the mem device is secure erased, cpu_cache_invalidate_memregion() is
called in order to invalidate all CPU caches before attempting to access
the mem device again.
See CXL 3.0 spec section 8.2.9.8.6.6 for reference.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/166983615293.2734609.10358657600295932156.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl/core')
| -rw-r--r-- | drivers/cxl/core/mbox.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c index 4f84d3962fb1..8747db329087 100644 --- a/drivers/cxl/core/mbox.c +++ b/drivers/cxl/core/mbox.c @@ -70,6 +70,7 @@ static struct cxl_mem_command cxl_mem_commands[CXL_MEM_COMMAND_ID_MAX] = { CXL_CMD(DISABLE_PASSPHRASE, 0x40, 0, 0), CXL_CMD(FREEZE_SECURITY, 0, 0, 0), CXL_CMD(UNLOCK, 0x20, 0, 0), + CXL_CMD(PASSPHRASE_SECURE_ERASE, 0x40, 0, 0), }; /* |