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authorViresh Kumar <viresh.kumar@linaro.org>2013-01-31 07:56:04 +0530
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2013-02-09 12:56:13 +0100
commit6ca939b3a304f82065985e66041e26366be65564 (patch)
tree49e4e9808275c990cbfb2b797779171dfdeb06b0 /drivers/cpufreq
parent2a4bd9f0db24ba14c8b38777d77add2682233c79 (diff)
downloadlwn-6ca939b3a304f82065985e66041e26366be65564.tar.gz
lwn-6ca939b3a304f82065985e66041e26366be65564.zip
cpufreq: exynos: simplify .init() for setting policy->cpus
With the recent changes in cpufreq core, we just need to set mask of all possible cpus into policy->cpus. Rest would be done by core. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/cpufreq')
-rw-r--r--drivers/cpufreq/exynos-cpufreq.c14
1 files changed, 1 insertions, 13 deletions
diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index 7012ea8bf1e7..81eb84a24fa7 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -227,19 +227,7 @@ static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
/* set the transition latency value */
policy->cpuinfo.transition_latency = 100000;
- /*
- * EXYNOS4 multi-core processors has 2 cores
- * that the frequency cannot be set independently.
- * Each cpu is bound to the same speed.
- * So the affected cpu is all of the cpus.
- */
- if (num_online_cpus() == 1) {
- cpumask_copy(policy->related_cpus, cpu_possible_mask);
- cpumask_copy(policy->cpus, cpu_online_mask);
- } else {
- policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
- cpumask_setall(policy->cpus);
- }
+ cpumask_setall(policy->cpus);
return cpufreq_frequency_table_cpuinfo(policy, exynos_info->freq_table);
}