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author | Heiko Stuebner <heiko@sntech.de> | 2014-05-09 05:48:44 +0900 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-05-09 05:48:44 +0900 |
commit | d8b532578f39fdec159105bc415938910351a699 (patch) | |
tree | 75627b044235bf5643c7f2a604c23e0c981ff8d3 /drivers/cpufreq/s3c24xx-cpufreq.c | |
parent | 3c27f314c676ee31eafd423ce2c640ed129cd5e0 (diff) | |
download | lwn-d8b532578f39fdec159105bc415938910351a699.tar.gz lwn-d8b532578f39fdec159105bc415938910351a699.zip |
ARM: S3C24XX: cpufreq-utils: don't write raw values to MPLLCON when using ccf
The s3c24xx cpufreq driver needs to change the mpll speed and was doing
this by writing raw values from a translation table into the MPLLCON
register.
Change this to use a regular clk_set_rate call when using the common
clock framework and only write the raw value in the samsung_clock case.
The s3c cpufreq driver does already aquire the mpll, so simply add a reference
to struct s3c_cpufreq_config to let set_fvco access it.
While struct clk is opaque the differenciation between samsung clock and
common clock is kept, as the samsung-clock mpll clk does not implement a
real set_rate.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'drivers/cpufreq/s3c24xx-cpufreq.c')
-rw-r--r-- | drivers/cpufreq/s3c24xx-cpufreq.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/cpufreq/s3c24xx-cpufreq.c b/drivers/cpufreq/s3c24xx-cpufreq.c index be1b2b5c9753..227ebf7c1eea 100644 --- a/drivers/cpufreq/s3c24xx-cpufreq.c +++ b/drivers/cpufreq/s3c24xx-cpufreq.c @@ -141,6 +141,7 @@ static int s3c_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg) static void s3c_cpufreq_setfvco(struct s3c_cpufreq_config *cfg) { + cfg->mpll = _clk_mpll; (cfg->info->set_fvco)(cfg); } |