diff options
author | Atish Patra <atish.patra@wdc.com> | 2019-02-13 12:18:10 -0800 |
---|---|---|
committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2019-02-23 12:13:45 +0100 |
commit | 26478b2f6a06ca36816e8f473aebe6f686b0df90 (patch) | |
tree | 834cf937888db0d419c8428c2caa1c2cf0af5a33 /drivers/clocksource | |
parent | 29f970cf670f12d72580662b2f291cf2dc86aaf5 (diff) | |
download | lwn-26478b2f6a06ca36816e8f473aebe6f686b0df90.tar.gz lwn-26478b2f6a06ca36816e8f473aebe6f686b0df90.zip |
clocksource/drivers/riscv: Add required checks during clock source init
Currently, clocksource registration happens for an invalid cpu for
non-smp kernels. This lead to kernel panic as cpu hotplug registration
will fail for those cpus. Moreover, riscv_hartid_to_cpuid can return
errors now.
Do not proceed if hartid or cpuid is invalid. Take this opportunity to
print appropriate error strings for different failure cases.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers/clocksource')
-rw-r--r-- | drivers/clocksource/timer-riscv.c | 23 |
1 files changed, 20 insertions, 3 deletions
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 431892200a08..e8163693e936 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -95,13 +95,30 @@ static int __init riscv_timer_init_dt(struct device_node *n) struct clocksource *cs; hartid = riscv_of_processor_hartid(n); + if (hartid < 0) { + pr_warn("Not valid hartid for node [%pOF] error = [%d]\n", + n, hartid); + return hartid; + } + cpuid = riscv_hartid_to_cpuid(hartid); + if (cpuid < 0) { + pr_warn("Invalid cpuid for hartid [%d]\n", hartid); + return cpuid; + } if (cpuid != smp_processor_id()) return 0; + pr_info("%s: Registering clocksource cpuid [%d] hartid [%d]\n", + __func__, cpuid, hartid); cs = per_cpu_ptr(&riscv_clocksource, cpuid); - clocksource_register_hz(cs, riscv_timebase); + error = clocksource_register_hz(cs, riscv_timebase); + if (error) { + pr_err("RISCV timer register failed [%d] for cpu = [%d]\n", + error, cpuid); + return error; + } sched_clock_register(riscv_sched_clock, BITS_PER_LONG, riscv_timebase); @@ -110,8 +127,8 @@ static int __init riscv_timer_init_dt(struct device_node *n) "clockevents/riscv/timer:starting", riscv_timer_starting_cpu, riscv_timer_dying_cpu); if (error) - pr_err("RISCV timer register failed [%d] for cpu = [%d]\n", - error, cpuid); + pr_err("cpu hp setup state failed for RISCV timer [%d]\n", + error); return error; } |