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| author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2022-11-04 17:18:46 +0100 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@kernel.org> | 2022-12-02 12:48:28 +0100 |
| commit | db78539fc95cf62b0b8f274368fcd8202eac91f9 (patch) | |
| tree | 99f718859b6254661dfed6e79b87836c6002f78e /drivers/clocksource | |
| parent | aa3f72ea9410f8c9394a5d25bbf40a4cfb56f5a0 (diff) | |
| download | lwn-db78539fc95cf62b0b8f274368fcd8202eac91f9.tar.gz lwn-db78539fc95cf62b0b8f274368fcd8202eac91f9.zip | |
clocksource/drivers/timer-npcm7xx: Enable timer 1 clock before use
In the WPCM450 SoC, the clocks for each timer can be gated individually.
To prevent the timer 1 clock from being gated, enable it explicitly.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20221104161850.2889894-3-j.neuschaefer@gmx.net
Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org>
Diffstat (limited to 'drivers/clocksource')
| -rw-r--r-- | drivers/clocksource/timer-npcm7xx.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/clocksource/timer-npcm7xx.c b/drivers/clocksource/timer-npcm7xx.c index a00520cbb660..9af30af5f989 100644 --- a/drivers/clocksource/timer-npcm7xx.c +++ b/drivers/clocksource/timer-npcm7xx.c @@ -188,6 +188,7 @@ static void __init npcm7xx_clocksource_init(void) static int __init npcm7xx_timer_init(struct device_node *np) { + struct clk *clk; int ret; ret = timer_of_init(np, &npcm7xx_to); @@ -199,6 +200,15 @@ static int __init npcm7xx_timer_init(struct device_node *np) npcm7xx_to.of_clk.rate = npcm7xx_to.of_clk.rate / (NPCM7XX_Tx_MIN_PRESCALE + 1); + /* Enable the clock for timer1, if it exists */ + clk = of_clk_get(np, 1); + if (clk) { + if (!IS_ERR(clk)) + clk_prepare_enable(clk); + else + pr_warn("%pOF: Failed to get clock for timer1: %pe", np, clk); + } + npcm7xx_clocksource_init(); npcm7xx_clockevents_init(); |