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author | Khiem Nguyen <khiem.nguyen.xt@renesas.com> | 2016-04-04 09:01:19 +0700 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-01-27 08:59:24 +0100 |
commit | d963654e109565cf73399815d7585917f2d69a30 (patch) | |
tree | 027e0ce270869db10db92bc298a7417366eb52fd /drivers/clk | |
parent | 2c8e79898c9af08e04b36d3678384642b59f6509 (diff) | |
download | lwn-d963654e109565cf73399815d7585917f2d69a30.tar.gz lwn-d963654e109565cf73399815d7585917f2d69a30.zip |
clk: renesas: r8a7796: Add IIC-DVFS clock
This patch adds DVFS clock for R8A7796 SoC.
Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
Signed-off-by: Dien Pham <dien.pham.ry@rvc.renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index 3bc36ef3aebf..11e084a56b0d 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -192,6 +192,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { DEF_MOD("can-if0", 916, R8A7796_CLK_S3D4), DEF_MOD("i2c6", 918, R8A7796_CLK_S0D6), DEF_MOD("i2c5", 919, R8A7796_CLK_S0D6), + DEF_MOD("i2c-dvfs", 926, R8A7796_CLK_CP), DEF_MOD("i2c4", 927, R8A7796_CLK_S0D6), DEF_MOD("i2c3", 928, R8A7796_CLK_S0D6), DEF_MOD("i2c2", 929, R8A7796_CLK_S3D2), |