diff options
author | Stephen Boyd <sboyd@codeaurora.org> | 2015-08-12 11:42:23 -0700 |
---|---|---|
committer | Michael Turquette <mturquette@baylibre.com> | 2015-08-24 16:49:12 -0700 |
commit | 836ee0f7d95c3feb742bd4b3a02fea3fe75bdef3 (patch) | |
tree | 8373b393c080d72c4f0fa240951babe06a9b8a55 /drivers/clk/ti | |
parent | e7df6f6e21883d7e8b3ad4641c911da8314ef283 (diff) | |
download | lwn-836ee0f7d95c3feb742bd4b3a02fea3fe75bdef3.tar.gz lwn-836ee0f7d95c3feb742bd4b3a02fea3fe75bdef3.zip |
clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)
Use the provider based method to get a clock's name so that we
can get rid of the clk member in struct clk_hw one day. Mostly
converted with the following coccinelle script.
@@
struct clk_hw *E;
@@
-__clk_get_name(E->clk)
+clk_hw_get_name(E)
Acked-by: Heiko Stuebner <heiko@sntech.de>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Kevin Cernekee <cernekee@chromium.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rockchip@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/ti')
-rw-r--r-- | drivers/clk/ti/apll.c | 4 | ||||
-rw-r--r-- | drivers/clk/ti/clkt_dflt.c | 8 | ||||
-rw-r--r-- | drivers/clk/ti/clockdomain.c | 14 |
3 files changed, 13 insertions, 13 deletions
diff --git a/drivers/clk/ti/apll.c b/drivers/clk/ti/apll.c index 24febd4fe324..f3eab6e79027 100644 --- a/drivers/clk/ti/apll.c +++ b/drivers/clk/ti/apll.c @@ -50,7 +50,7 @@ static int dra7_apll_enable(struct clk_hw *hw) if (!ad) return -EINVAL; - clk_name = __clk_get_name(clk->hw.clk); + clk_name = clk_hw_get_name(&clk->hw); state <<= __ffs(ad->idlest_mask); @@ -273,7 +273,7 @@ static int omap2_apll_enable(struct clk_hw *hw) if (i == MAX_APLL_WAIT_TRIES) { pr_warn("%s failed to transition to locked\n", - __clk_get_name(clk->hw.clk)); + clk_hw_get_name(&clk->hw)); return -EBUSY; } diff --git a/drivers/clk/ti/clkt_dflt.c b/drivers/clk/ti/clkt_dflt.c index a176b8ac8dd0..90d7d8a21c49 100644 --- a/drivers/clk/ti/clkt_dflt.c +++ b/drivers/clk/ti/clkt_dflt.c @@ -110,7 +110,7 @@ static void _omap2_module_wait_ready(struct clk_hw_omap *clk) if (r) { /* IDLEST register not in the CM module */ _wait_idlest_generic(clk, idlest_reg, (1 << idlest_bit), - idlest_val, __clk_get_name(clk->hw.clk)); + idlest_val, clk_hw_get_name(&clk->hw)); } else { ti_clk_ll_ops->cm_wait_module_ready(0, prcm_mod, idlest_reg_id, idlest_bit); @@ -216,7 +216,7 @@ int omap2_dflt_clk_enable(struct clk_hw *hw) if (ret) { WARN(1, "%s: could not enable %s's clockdomain %s: %d\n", - __func__, __clk_get_name(hw->clk), + __func__, clk_hw_get_name(hw), clk->clkdm_name, ret); return ret; } @@ -224,7 +224,7 @@ int omap2_dflt_clk_enable(struct clk_hw *hw) if (unlikely(!clk->enable_reg)) { pr_err("%s: %s missing enable_reg\n", __func__, - __clk_get_name(hw->clk)); + clk_hw_get_name(hw)); ret = -EINVAL; goto err; } @@ -270,7 +270,7 @@ void omap2_dflt_clk_disable(struct clk_hw *hw) * controlled by its parent. */ pr_err("%s: independent clock %s has no enable_reg\n", - __func__, __clk_get_name(hw->clk)); + __func__, clk_hw_get_name(hw)); return; } diff --git a/drivers/clk/ti/clockdomain.c b/drivers/clk/ti/clockdomain.c index 362a62c10311..b9bc3b8df659 100644 --- a/drivers/clk/ti/clockdomain.c +++ b/drivers/clk/ti/clockdomain.c @@ -48,23 +48,23 @@ int omap2_clkops_enable_clkdm(struct clk_hw *hw) if (unlikely(!clk->clkdm)) { pr_err("%s: %s: no clkdm set ?!\n", __func__, - __clk_get_name(hw->clk)); + clk_hw_get_name(hw)); return -EINVAL; } if (unlikely(clk->enable_reg)) pr_err("%s: %s: should use dflt_clk_enable ?!\n", __func__, - __clk_get_name(hw->clk)); + clk_hw_get_name(hw)); if (ti_clk_get_features()->flags & TI_CLK_DISABLE_CLKDM_CONTROL) { pr_err("%s: %s: clkfw-based clockdomain control disabled ?!\n", - __func__, __clk_get_name(hw->clk)); + __func__, clk_hw_get_name(hw)); return 0; } ret = ti_clk_ll_ops->clkdm_clk_enable(clk->clkdm, hw->clk); WARN(ret, "%s: could not enable %s's clockdomain %s: %d\n", - __func__, __clk_get_name(hw->clk), clk->clkdm_name, ret); + __func__, clk_hw_get_name(hw), clk->clkdm_name, ret); return ret; } @@ -86,17 +86,17 @@ void omap2_clkops_disable_clkdm(struct clk_hw *hw) if (unlikely(!clk->clkdm)) { pr_err("%s: %s: no clkdm set ?!\n", __func__, - __clk_get_name(hw->clk)); + clk_hw_get_name(hw)); return; } if (unlikely(clk->enable_reg)) pr_err("%s: %s: should use dflt_clk_disable ?!\n", __func__, - __clk_get_name(hw->clk)); + clk_hw_get_name(hw)); if (ti_clk_get_features()->flags & TI_CLK_DISABLE_CLKDM_CONTROL) { pr_err("%s: %s: clkfw-based clockdomain control disabled ?!\n", - __func__, __clk_get_name(hw->clk)); + __func__, clk_hw_get_name(hw)); return; } |