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| author | Joseph Lo <josephl@nvidia.com> | 2019-05-29 16:21:35 +0800 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-05-12 22:48:42 +0200 |
| commit | 0ac65fc946d3a15ff30cea28b38a00b9ba98217b (patch) | |
| tree | a52d5434512c1a1854e4e81dd85d63c0e5339bfa /drivers/clk/tegra/Makefile | |
| parent | a3cba697a2a09e6769996d5265991a3228004d92 (diff) | |
| download | lwn-0ac65fc946d3a15ff30cea28b38a00b9ba98217b.tar.gz lwn-0ac65fc946d3a15ff30cea28b38a00b9ba98217b.zip | |
clk: tegra: Implement Tegra210 EMC clock
The EMC clock needs to carefully coordinate with the EMC controller
programming to make sure external memory can be properly clocked. Do so
by hooking up the EMC clock with an EMC provider that will specify which
rates are supported by the EMC and provide a callback to use for setting
the clock rate at the EMC.
Based on work by Peter De Schrijver <pdeschrijver@nvidia.com>.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/Makefile')
| -rw-r--r-- | drivers/clk/tegra/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/tegra/Makefile b/drivers/clk/tegra/Makefile index 7f5f5ec33739..6e1200b3bb68 100644 --- a/drivers/clk/tegra/Makefile +++ b/drivers/clk/tegra/Makefile @@ -25,5 +25,6 @@ obj-$(CONFIG_TEGRA124_EMC) += clk-tegra124-emc.o obj-$(CONFIG_ARCH_TEGRA_132_SOC) += clk-tegra124.o obj-y += cvb.o obj-$(CONFIG_ARCH_TEGRA_210_SOC) += clk-tegra210.o +obj-$(CONFIG_ARCH_TEGRA_210_SOC) += clk-tegra210-emc.o obj-$(CONFIG_CLK_TEGRA_BPMP) += clk-bpmp.o obj-y += clk-utils.o |