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author | Pankaj Dubey <pankaj.dubey@samsung.com> | 2014-09-05 17:24:41 +0530 |
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committer | Tomasz Figa <tomasz.figa@gmail.com> | 2014-09-22 14:28:38 +0200 |
commit | e82ba578ccdeb3faa90dfcee06dbbb8dffe1145a (patch) | |
tree | a9c6b057911a1edbb69ff2595d98feaaf1106386 /drivers/clk/samsung | |
parent | 59037b92f440c10d0c717a91f0b35a49b774c708 (diff) | |
download | lwn-e82ba578ccdeb3faa90dfcee06dbbb8dffe1145a.tar.gz lwn-e82ba578ccdeb3faa90dfcee06dbbb8dffe1145a.zip |
clk: samsung: exynos3250: fix width field of mout_mmc0/1
As per Exynos3250 user manual mmc0/1 mux selection has 4 bit wide.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Diffstat (limited to 'drivers/clk/samsung')
-rw-r--r-- | drivers/clk/samsung/clk-exynos3250.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk-exynos3250.c index f8bf4bf0fb08..5e2d86e2cede 100644 --- a/drivers/clk/samsung/clk-exynos3250.c +++ b/drivers/clk/samsung/clk-exynos3250.c @@ -354,8 +354,8 @@ static struct samsung_mux_clock mux_clks[] __initdata = { /* SRC_FSYS */ MUX(CLK_MOUT_TSADC, "mout_tsadc", group_sclk_p, SRC_FSYS, 28, 4), - MUX(CLK_MOUT_MMC1, "mout_mmc1", group_sclk_p, SRC_FSYS, 4, 3), - MUX(CLK_MOUT_MMC0, "mout_mmc0", group_sclk_p, SRC_FSYS, 0, 3), + MUX(CLK_MOUT_MMC1, "mout_mmc1", group_sclk_p, SRC_FSYS, 4, 4), + MUX(CLK_MOUT_MMC0, "mout_mmc0", group_sclk_p, SRC_FSYS, 0, 4), /* SRC_PERIL0 */ MUX(CLK_MOUT_UART1, "mout_uart1", group_sclk_p, SRC_PERIL0, 4, 4), |