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authorStephen Boyd <sboyd@codeaurora.org>2017-11-14 10:07:44 -0800
committerStephen Boyd <sboyd@codeaurora.org>2017-11-14 10:07:44 -0800
commit4c4fe1697162a211ded0ccdde4c78acbbe64b5e8 (patch)
tree45d5195449eea072202d30d302eb74e57b47dbcf /drivers/clk/mediatek/clk-mtk.h
parenteed58151d606e81812448931d952ee39071d1f76 (diff)
parent2fc0a509e4ee858a450f28a4efb430835004dd70 (diff)
downloadlwn-4c4fe1697162a211ded0ccdde4c78acbbe64b5e8.tar.gz
lwn-4c4fe1697162a211ded0ccdde4c78acbbe64b5e8.zip
Merge branch 'clk-mediatek' into clk-next
* clk-mediatek: clk: mediatek: add clock support for MT7622 SoC clk: mediatek: add clocks dt-bindings required header for MT7622 SoC clk: mediatek: add the option for determining PLL source clock dt-bindings: clock: mediatek: document clk bindings for MediaTek MT7622 SoC clk: mediatek: mark mtk_infrasys_init_early __init clk: mediatek: Add MT2712 clock support clk: mediatek: Add dt-bindings for MT2712 clocks dt-bindings: ARM: Mediatek: Document bindings for MT2712
Diffstat (limited to 'drivers/clk/mediatek/clk-mtk.h')
-rw-r--r--drivers/clk/mediatek/clk-mtk.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
index f5d6b70ce189..f10250dcece4 100644
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -207,6 +207,8 @@ struct mtk_pll_data {
uint32_t en_mask;
uint32_t pd_reg;
uint32_t tuner_reg;
+ uint32_t tuner_en_reg;
+ uint8_t tuner_en_bit;
int pd_shift;
unsigned int flags;
const struct clk_ops *ops;
@@ -216,6 +218,7 @@ struct mtk_pll_data {
uint32_t pcw_reg;
int pcw_shift;
const struct mtk_pll_div_table *div_table;
+ const char *parent_name;
};
void mtk_clk_register_plls(struct device_node *node,