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| author | James Liao <jamesjj.liao@mediatek.com> | 2015-04-23 10:35:39 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2015-05-05 22:50:31 -0700 |
| commit | 9741b1a68035b541005db1a4d7623bd9b3522ab4 (patch) | |
| tree | d78897587e33ebb5d6a38a62bed6935adbf840bd /drivers/clk/mediatek/Makefile | |
| parent | 2893c379461a208b3059f55dfe4dafa06b4aa46a (diff) | |
| download | lwn-9741b1a68035b541005db1a4d7623bd9b3522ab4.tar.gz lwn-9741b1a68035b541005db1a4d7623bd9b3522ab4.zip | |
clk: mediatek: Add initial common clock support for Mediatek SoCs.
This patch adds common clock support for Mediatek SoCs, including plls,
muxes and clock gates.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[sboyd@codeaurora.org: Squelch checkpatch warning in clk-mtk.h]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/mediatek/Makefile')
| -rw-r--r-- | drivers/clk/mediatek/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile new file mode 100644 index 000000000000..c384e9778d1a --- /dev/null +++ b/drivers/clk/mediatek/Makefile @@ -0,0 +1 @@ +obj-y += clk-mtk.o clk-pll.o clk-gate.o |