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author | Abel Vesa <abel.vesa@nxp.com> | 2019-12-11 11:25:41 +0200 |
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committer | Shawn Guo <shawnguo@kernel.org> | 2019-12-11 19:19:35 +0800 |
commit | ba7928d9d71f15e15e7ba300426422f928440eb5 (patch) | |
tree | 24b0b00ad34a086a36cbaf6d7f542eaa66279660 /drivers/clk/imx/clk.h | |
parent | f60f1c62c3188fcca945581e35e3440ee3fdcc95 (diff) | |
download | lwn-ba7928d9d71f15e15e7ba300426422f928440eb5.tar.gz lwn-ba7928d9d71f15e15e7ba300426422f928440eb5.zip |
clk: imx: Rename the SCCG to SSCG
According to the manual the acronym stands for
Spread Sprectum Clock Generator.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk/imx/clk.h')
-rw-r--r-- | drivers/clk/imx/clk.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index 00ec48107c0c..4770a03ac1ca 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -24,7 +24,7 @@ enum imx_pllv1_type { IMX_PLLV1_IMX35, }; -enum imx_sccg_pll_type { +enum imx_sscg_pll_type { SCCG_PLL1, SCCG_PLL2, }; @@ -110,7 +110,7 @@ struct clk *imx_clk_pllv2(const char *name, const char *parent, struct clk *imx_clk_frac_pll(const char *name, const char *parent_name, void __iomem *base); -struct clk *imx_clk_sccg_pll(const char *name, +struct clk *imx_clk_sscg_pll(const char *name, const char * const *parent_names, u8 num_parents, u8 parent, u8 bypass1, u8 bypass2, |