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| author | Anson Huang <Anson.Huang@nxp.com> | 2019-09-06 09:34:05 -0400 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2019-10-06 10:13:01 +0800 |
| commit | 43cdaa1567ad3931fbde438853947d45238cc040 (patch) | |
| tree | 4e561fd3dfaf335604655ebd5b27f1dbf2af871b /drivers/clk/imx/clk.h | |
| parent | 094234fcf46146339caaac8282aa15d225a5911a (diff) | |
| download | lwn-43cdaa1567ad3931fbde438853947d45238cc040.tar.gz lwn-43cdaa1567ad3931fbde438853947d45238cc040.zip | |
clk: imx8mm: Move 1443X/1416X PLL clock structure to common place
Many i.MX8M SoCs use same 1443X/1416X PLL, such as i.MX8MM,
i.MX8MN and later i.MX8M SoCs, moving these PLL definitions
to pll14xx driver can save a lot of duplicated code on each
platform.
Meanwhile, no need to define PLL clock structure for every
module which uses same type of PLL, e.g., audio/video/dram use
1443X PLL, arm/gpu/vpu/sys use 1416X PLL, define 2 PLL clock
structure for each group is enough.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk/imx/clk.h')
| -rw-r--r-- | drivers/clk/imx/clk.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index f7a389a50401..bc5bb6ac8636 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -50,6 +50,9 @@ struct imx_pll14xx_clk { int flags; }; +extern struct imx_pll14xx_clk imx_1416x_pll; +extern struct imx_pll14xx_clk imx_1443x_pll; + #define imx_clk_cpu(name, parent_name, div, mux, pll, step) \ imx_clk_hw_cpu(name, parent_name, div, mux, pll, step)->clk |