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authorRobert Hancock <robert.hancock@calian.com>2021-03-25 13:26:41 -0600
committerStephen Boyd <sboyd@kernel.org>2021-06-27 19:58:14 -0700
commitab89a3439ffa61913a625c34758a46c8ca0c0713 (patch)
tree24ca602e1ca3cef3a8013e85b375b5e3a69a28e9 /drivers/clk/clk-si5341.c
parentb7bbf6ec4940d1a69811ec354edeeb9751fa8e85 (diff)
downloadlwn-ab89a3439ffa61913a625c34758a46c8ca0c0713.tar.gz
lwn-ab89a3439ffa61913a625c34758a46c8ca0c0713.zip
clk: si5341: Add silabs,xaxb-ext-clk property
Add a property to allow specifying that the device XA/XB pins are used for an external clock input rather than for a clock crystal. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Link: https://lore.kernel.org/r/20210325192643.2190069-8-robert.hancock@calian.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/clk-si5341.c')
-rw-r--r--drivers/clk/clk-si5341.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/clk/clk-si5341.c b/drivers/clk/clk-si5341.c
index 28ac7085f362..c5ab4a5ae6a5 100644
--- a/drivers/clk/clk-si5341.c
+++ b/drivers/clk/clk-si5341.c
@@ -80,6 +80,7 @@ struct clk_si5341 {
u8 num_outputs;
u8 num_synth;
u16 chip_id;
+ bool xaxb_ext_clk;
};
#define to_clk_si5341(_hw) container_of(_hw, struct clk_si5341, hw)
@@ -529,9 +530,11 @@ static int si5341_clk_reparent(struct clk_si5341 *data, u8 index)
if (err < 0)
return err;
- /* Power up XTAL oscillator and buffer */
+ /* Power up XTAL oscillator and buffer, select clock mode */
err = regmap_update_bits(data->regmap, SI5341_XAXB_CFG,
- SI5341_XAXB_CFG_PDNB, SI5341_XAXB_CFG_PDNB);
+ SI5341_XAXB_CFG_PDNB | SI5341_XAXB_CFG_EXTCLK_EN,
+ SI5341_XAXB_CFG_PDNB | (data->xaxb_ext_clk ?
+ SI5341_XAXB_CFG_EXTCLK_EN : 0));
if (err < 0)
return err;
}
@@ -1539,6 +1542,8 @@ static int si5341_probe(struct i2c_client *client,
initialization_required = !err;
}
+ data->xaxb_ext_clk = of_property_read_bool(client->dev.of_node,
+ "silabs,xaxb-ext-clk");
if (initialization_required) {
/* Populate the regmap cache in preparation for "cache only" */