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| author | Stephen Boyd <sboyd@codeaurora.org> | 2016-03-01 17:26:48 -0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-03-02 14:31:31 -0800 |
| commit | 0f75e1a370fd843c9e508fc1ccf0662833034827 (patch) | |
| tree | c73d8de4cf553398140082990185ebd8d81eab57 /drivers/clk/clk-pwm.c | |
| parent | 3b0f4ae3e9f101ecfd918efd2a82fca0ae0b6c95 (diff) | |
| download | lwn-0f75e1a370fd843c9e508fc1ccf0662833034827.tar.gz lwn-0f75e1a370fd843c9e508fc1ccf0662833034827.zip | |
clk: qcom: msm8960: Fix ce3_src register offset
The offset seems to have been copied from the sata clk. Fix it so
that enabling the crypto engine source clk works.
Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Fixes: 5f775498bdc4 ("clk: qcom: Fully support apq8064 global clock control")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/clk-pwm.c')
0 files changed, 0 insertions, 0 deletions