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authorVladimir Zapolskiy <vz@mleia.com>2015-12-06 12:45:57 +0200
committerMichael Turquette <mturquette@baylibre.com>2015-12-24 12:31:26 -0800
commitf7c82a60ba26c2f003662bcb2cff131021c1e828 (patch)
tree5f86b73f7381c0fe34f426f0e03da5f8021e8602 /drivers/clk/Kconfig
parent8a896310a7ea5fa99fc89690bde7be404c7e1113 (diff)
downloadlwn-f7c82a60ba26c2f003662bcb2cff131021c1e828.tar.gz
lwn-f7c82a60ba26c2f003662bcb2cff131021c1e828.zip
clk: lpc32xx: add common clock framework driver
Add support for all configurable clocks found on NXP LPC32xx SoC. The list contains several heterogenous groups of clocks: * system clocks including multiple dividers and muxes, * x397 PLL, HCLK PLL and USB PLL, * peripheral clocks inherited from rtc, hclk and pclk, * USB controller clocks: AHB slave, I2C, OTG, OHCI and device. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Diffstat (limited to 'drivers/clk/Kconfig')
-rw-r--r--drivers/clk/Kconfig6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 7fc1eb90ca2b..bd2b504df603 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -161,6 +161,12 @@ config COMMON_CLK_KEYSTONE
Supports clock drivers for Keystone based SOCs. These SOCs have local
a power sleep control module that gate the clock to the IPs and PLLs.
+config COMMON_CLK_NXP
+ def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
+ select REGMAP_MMIO if ARCH_LPC32XX
+ ---help---
+ Support for clock providers on NXP platforms.
+
config COMMON_CLK_PALMAS
tristate "Clock driver for TI Palmas devices"
depends on MFD_PALMAS