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| author | Gabriel Fernandez <gabriel.fernandez@foss.st.com> | 2023-12-08 15:36:56 +0100 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2023-12-17 15:33:26 -0800 |
| commit | 3ac7ca599515d335a55009c9c1016f244ef82a79 (patch) | |
| tree | fba5806c7c7b2d57c1ee40074ed79a522d4f4c7e /drivers/clk/Kconfig | |
| parent | b85ea95d086471afb4ad062012a4d73cd328fa86 (diff) | |
| download | lwn-3ac7ca599515d335a55009c9c1016f244ef82a79.tar.gz lwn-3ac7ca599515d335a55009c9c1016f244ef82a79.zip | |
clk: stm32mp1: move stm32mp1 clock driver into stm32 directory
Move all STM32MP clock drivers into same directory (stm32).
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Link: https://lore.kernel.org/r/20231208143700.354785-2-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/Kconfig')
| -rw-r--r-- | drivers/clk/Kconfig | 11 |
1 files changed, 1 insertions, 10 deletions
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index c30d0d396f7a..50af5fc7f570 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -414,16 +414,6 @@ config COMMON_CLK_VC7 Renesas Versaclock7 is a family of configurable clock generator and jitter attenuator ICs with fractional and integer dividers. -config COMMON_CLK_STM32MP135 - def_bool COMMON_CLK && MACH_STM32MP13 - help - Support for stm32mp135 SoC family clocks - -config COMMON_CLK_STM32MP157 - def_bool COMMON_CLK && MACH_STM32MP157 - help - Support for stm32mp157 SoC family clocks - config COMMON_CLK_STM32F def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746) help @@ -504,6 +494,7 @@ source "drivers/clk/starfive/Kconfig" source "drivers/clk/sunxi/Kconfig" source "drivers/clk/sunxi-ng/Kconfig" source "drivers/clk/tegra/Kconfig" +source "drivers/clk/stm32/Kconfig" source "drivers/clk/ti/Kconfig" source "drivers/clk/uniphier/Kconfig" source "drivers/clk/visconti/Kconfig" |