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authorTejun Heo <htejun@gmail.com>2008-05-19 01:15:10 +0900
committerJeff Garzik <jgarzik@redhat.com>2008-05-19 17:51:47 -0400
commitbf1bff6fa9fdd4e92e57d80a5434fd5201c051fc (patch)
tree0ebd09fbf4e7f9f5e81e479685930c180eaece76 /drivers/ata
parente0614db2a398d4d0dc5fb47fe2c2783141262a3e (diff)
downloadlwn-bf1bff6fa9fdd4e92e57d80a5434fd5201c051fc.tar.gz
lwn-bf1bff6fa9fdd4e92e57d80a5434fd5201c051fc.zip
libata: increase PMP register access timeout to 3s
This timeout was set low because previously PMP register access was done via polling and register access timeouts could stack up. This is no longer the case. One timeout will make all following accesses fail immediately. In rare cases both marvell and SIMG PMPs need almost a second. Bump it to 3s. While at it, rename it to SATA_PMP_RW_TIMEOUT. It's not specific to SCR access. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/ata')
-rw-r--r--drivers/ata/libata-pmp.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/ata/libata-pmp.c b/drivers/ata/libata-pmp.c
index f3ad024394c2..04a486a3e7b8 100644
--- a/drivers/ata/libata-pmp.c
+++ b/drivers/ata/libata-pmp.c
@@ -48,7 +48,7 @@ static unsigned int sata_pmp_read(struct ata_link *link, int reg, u32 *r_val)
tf.device = link->pmp;
err_mask = ata_exec_internal(pmp_dev, &tf, NULL, DMA_NONE, NULL, 0,
- SATA_PMP_SCR_TIMEOUT);
+ SATA_PMP_RW_TIMEOUT);
if (err_mask)
return err_mask;
@@ -88,7 +88,7 @@ static unsigned int sata_pmp_write(struct ata_link *link, int reg, u32 val)
tf.lbah = (val >> 24) & 0xff;
return ata_exec_internal(pmp_dev, &tf, NULL, DMA_NONE, NULL, 0,
- SATA_PMP_SCR_TIMEOUT);
+ SATA_PMP_RW_TIMEOUT);
}
/**