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author | Tejun Heo <htejun@gmail.com> | 2007-11-19 16:03:44 +0900 |
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committer | Jeff Garzik <jeff@garzik.org> | 2008-01-23 05:24:10 -0500 |
commit | 49f290903935612aadab3899a4aca884c1140348 (patch) | |
tree | 93e98e81a7d359c679ce081295d939be948c1c80 /drivers/ata/pata_ali.c | |
parent | 51dbd490614e6228e9b2b198bd4f5f76ef961059 (diff) | |
download | lwn-49f290903935612aadab3899a4aca884c1140348.tar.gz lwn-49f290903935612aadab3899a4aca884c1140348.zip |
ahci: update PCS programming
For intel ones, ahci unconditionally OR'd 0xf to PCS. This isn't
correct for the following cases.
* ich6/7m's which only implement P0 and P2 (0xf works fine tho)
* ich8/9's which have six ports and needs 0x3f to enable all ports
This patch updates PCS programming such that...
* port_map determined by ahci_save_initial_config() is OR'd instead of 0xf
* PCS is updated only if necessary (there are turned off enable bits)
port_map is determined from PORTS_IMPL PCI register which is
implemented as write or write-once register. If the register isn't
programmed, ahci automatically generates it from number of ports,
which is good enough for PCS programming. ICH6/7M are probably the
only ones where non-contiguous enable bits are necessary && PORTS_IMPL
isn't programmed properly but they're proven to work reliably with 0xf
anyway.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/pata_ali.c')
0 files changed, 0 insertions, 0 deletions