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authorMaciej W. Rozycki <macro@imgtec.com>2016-10-31 16:26:24 +0000
committerRalf Baechle <ralf@linux-mips.org>2016-11-04 01:38:50 +0100
commit6daaa3266db9cc488612690e42c23b0763e2b49a (patch)
tree125b090f45799901b3f64166c1070e231580f10b /crypto/xts.c
parent35938a00ba86ae7a7404b66b526968ca2b8d3127 (diff)
downloadlwn-6daaa3266db9cc488612690e42c23b0763e2b49a.tar.gz
lwn-6daaa3266db9cc488612690e42c23b0763e2b49a.zip
MIPS: Remove FIR from ISA I FP signal context
Complement commit e50c0a8fa60d ("Support the MIPS32 / MIPS64 DSP ASE.") and remove the Floating Point Implementation Register (FIR) from the FP register set recorded in a signal context with MIPS I processors too, in line with the change applied to r4k_fpu.S. The `sc_fpc_eir' slot is unused according to our current ABI and the FIR register is read-only and always directly accessible from user software. [ralf@linux-mips.org: This is also required because the next commit depends on it.] Signed-off-by: Maciej W. Rozycki <macro@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14475/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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