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authorTim Harvey <tharvey@gateworks.com>2021-07-27 09:10:58 -0700
committerShawn Guo <shawnguo@kernel.org>2021-08-14 12:39:27 +0800
commit500659f3b401fe6ffd1d63f2449d16d8a4204db7 (patch)
treed2d55469a254afb745651e4a6108df0ca9692cb6 /arch
parent092cd75e527044050ea76bf774e7d730709b7e8b (diff)
downloadlwn-500659f3b401fe6ffd1d63f2449d16d8a4204db7.tar.gz
lwn-500659f3b401fe6ffd1d63f2449d16d8a4204db7.zip
arm64: dts: imx8mm-venice-gw700x: fix invalid pmic pin config
The GW700x PMIC does not have an interrupt. Remove the invalid pin config. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi
index 11dda79cc46b..00f86cada30d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi
@@ -278,8 +278,6 @@
pmic@69 {
compatible = "mps,mp5416";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pmic>;
reg = <0x69>;
regulators {
@@ -444,12 +442,6 @@
>;
};
- pinctrl_pmic: pmicgrp {
- fsl,pins = <
- MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
- >;
- };
-
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140