diff options
| author | Johan Hovold <johan+linaro@kernel.org> | 2022-11-10 11:35:56 +0100 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2022-11-11 21:35:45 -0600 |
| commit | b4bb952e6cfc13f86b4b52c3039b199dd3f16020 (patch) | |
| tree | 0efddf90bc8963b86d7db1f0ea1f3aaf6f5e5080 /arch | |
| parent | d907fe5acbf1061f86936485d604c229e68ae312 (diff) | |
| download | lwn-b4bb952e6cfc13f86b4b52c3039b199dd3f16020.tar.gz lwn-b4bb952e6cfc13f86b4b52c3039b199dd3f16020.zip | |
arm64: dts: qcom: sc8280xp-x13s: enable NVMe SSD
Enable the NVMe SSD connected to PCIe2.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-8-johan+linaro@kernel.org
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 02083342bfca..e212b5307f98 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -124,6 +124,22 @@ regulator-boot-on; regulator-always-on; }; + + vreg_nvme: regulator-nvme { + compatible = "regulator-fixed"; + + regulator-name = "VCC3_SSD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 135 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&nvme_reg_en>; + + regulator-boot-on; + }; }; &apps_rsc { @@ -211,6 +227,13 @@ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; }; + vreg_l6d: ldo6 { + regulator-name = "vreg_l6d"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + vreg_l7d: ldo7 { regulator-name = "vreg_l7d"; regulator-min-microvolt = <3072000>; @@ -227,6 +250,25 @@ }; }; +&pcie2a { + perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply = <&vreg_nvme>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie2a_default>; + + status = "okay"; +}; + +&pcie2a_phy { + vdda-phy-supply = <&vreg_l6d>; + vdda-pll-supply = <&vreg_l4d>; + + status = "okay"; +}; + &pmc8280c_lpg { status = "okay"; }; @@ -592,6 +634,36 @@ }; }; + nvme_reg_en: nvme-reg-en-state { + pins = "gpio135"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + pcie2a_default: pcie2a-default-state { + clkreq-n-pins { + pins = "gpio142"; + function = "pcie2a_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio143"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-n-pins { + pins = "gpio145"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + qup0_i2c4_default: qup0-i2c4-default-state { pins = "gpio171", "gpio172"; function = "qup4"; |