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| author | Heiko Stuebner <heiko@sntech.de> | 2022-09-05 13:10:25 +0200 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-10-13 08:46:28 -0700 |
| commit | 499590c084f13b6aca225e5766edeebd48437ee8 (patch) | |
| tree | d2df6fa87edc3f5dd720c579ba404ffb7d0a71f3 /arch | |
| parent | f055268e3946555deb9bb80b2c8c9798c64dbc47 (diff) | |
| download | lwn-499590c084f13b6aca225e5766edeebd48437ee8.tar.gz lwn-499590c084f13b6aca225e5766edeebd48437ee8.zip | |
riscv: use BIT() macros in t-head errata init
Using the appropriate BIT macro makes the code better readable.
Suggested-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20220905111027.2463297-4-heiko@sntech.de
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/riscv/errata/thead/errata.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c index bffa711aaf64..a6f4bd8ccf3f 100644 --- a/arch/riscv/errata/thead/errata.c +++ b/arch/riscv/errata/thead/errata.c @@ -49,10 +49,10 @@ static u32 thead_errata_probe(unsigned int stage, u32 cpu_req_errata = 0; if (errata_probe_pbmt(stage, archid, impid)) - cpu_req_errata |= (1U << ERRATA_THEAD_PBMT); + cpu_req_errata |= BIT(ERRATA_THEAD_PBMT); if (errata_probe_cmo(stage, archid, impid)) - cpu_req_errata |= (1U << ERRATA_THEAD_CMO); + cpu_req_errata |= BIT(ERRATA_THEAD_CMO); return cpu_req_errata; } |