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authorPeter Zijlstra <peterz@infradead.org>2016-08-26 15:06:04 +0200
committerIngo Molnar <mingo@kernel.org>2016-09-22 14:47:02 +0200
commit9bf6ffdabdd6e70a0b69d032a0aff091afe1773e (patch)
treedb07f7aae991eecdd537a1854324c0d5edd29048 /arch
parent7d1e042314619115153a0f6f06e4552c09a50e13 (diff)
downloadlwn-9bf6ffdabdd6e70a0b69d032a0aff091afe1773e.tar.gz
lwn-9bf6ffdabdd6e70a0b69d032a0aff091afe1773e.zip
locking/atomic, arch/sh: Fix ATOMIC_FETCH_OP()
We cannot use the "z" constraint twice, since its a single register (r0). Change the one not used by movli.l/movco.l to "r". Reported-by: Fengguang Wu <fengguang.wu@intel.com> Tested-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rich Felker <dalias@libc.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/include/asm/atomic-llsc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/include/asm/atomic-llsc.h b/arch/sh/include/asm/atomic-llsc.h
index caea2c45f6c2..1d159ce50f5a 100644
--- a/arch/sh/include/asm/atomic-llsc.h
+++ b/arch/sh/include/asm/atomic-llsc.h
@@ -60,7 +60,7 @@ static inline int atomic_fetch_##op(int i, atomic_t *v) \
" movco.l %0, @%3 \n" \
" bf 1b \n" \
" synco \n" \
- : "=&z" (temp), "=&z" (res) \
+ : "=&z" (temp), "=&r" (res) \
: "r" (i), "r" (&v->counter) \
: "t"); \
\