diff options
| author | Biju Das <biju.das@bp.renesas.com> | 2017-11-13 17:43:12 +0000 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2017-11-27 11:40:24 +0100 |
| commit | b3a0317e312cc6d6359c7a0854d763cde528391d (patch) | |
| tree | a127196d9135814d128a7de84fa3d9e5ea409486 /arch | |
| parent | 4c5c952e61190e5a0e06128156eef84d290a0045 (diff) | |
| download | lwn-b3a0317e312cc6d6359c7a0854d763cde528391d.tar.gz lwn-b3a0317e312cc6d6359c7a0854d763cde528391d.zip | |
ARM: dts: iwg20d-q7: Enable PCIe Controller
Enable PCIe Controller & set PCIe bus clock frequency.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/iwg20d-q7-common.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi index 3e4bc4d6b9d3..54470c6de891 100644 --- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi +++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi @@ -96,6 +96,14 @@ pinctrl-names = "default"; }; +&pcie_bus_clk { + clock-frequency = <100000000>; +}; + +&pciec { + status = "okay"; +}; + &pfc { can0_pins: can0 { groups = "can0_data_d"; |