diff options
author | Paul Cercueil <paul@crapouillou.net> | 2020-07-30 18:12:33 +0200 |
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committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-07-31 17:48:57 +0200 |
commit | 48f5dd56cf2980ff932c6fd98ff5a2c503cde97b (patch) | |
tree | 80d887f17cfe6baf863dae364706dbbba6f7da7e /arch | |
parent | 714b649dc7123c23f5082e8d11d2b81acf5b7a78 (diff) | |
download | lwn-48f5dd56cf2980ff932c6fd98ff5a2c503cde97b.tar.gz lwn-48f5dd56cf2980ff932c6fd98ff5a2c503cde97b.zip |
MIPS: ingenic: Hardcode mem size for qi,lb60 board
Old Device Tree for the qi,lb60 (aka. Ben Nanonote) did not have a
'memory' node. The kernel would then read the memory controller
registers to know how much RAM was available.
Since every other supported board has had a 'memory' node from the
beginning, we can just hardcode a RAM size of 32 MiB when running with
an old Device Tree without the 'memory' node.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/jz4740/setup.c | 37 |
1 files changed, 8 insertions, 29 deletions
diff --git a/arch/mips/jz4740/setup.c b/arch/mips/jz4740/setup.c index d73c9b722bf3..51d906325ce6 100644 --- a/arch/mips/jz4740/setup.c +++ b/arch/mips/jz4740/setup.c @@ -14,6 +14,7 @@ #include <linux/of_clk.h> #include <linux/of_fdt.h> #include <linux/pm.h> +#include <linux/sizes.h> #include <linux/suspend.h> #include <asm/bootinfo.h> @@ -22,31 +23,6 @@ #include <asm/reboot.h> #include <asm/time.h> -#define JZ4740_EMC_BASE_ADDR 0x13010000 - -#define JZ4740_EMC_SDRAM_CTRL 0x80 - -static void __init jz4740_detect_mem(void) -{ - void __iomem *jz_emc_base; - u32 ctrl, bus, bank, rows, cols; - phys_addr_t size; - - jz_emc_base = ioremap(JZ4740_EMC_BASE_ADDR, 0x100); - ctrl = readl(jz_emc_base + JZ4740_EMC_SDRAM_CTRL); - bus = 2 - ((ctrl >> 31) & 1); - bank = 1 + ((ctrl >> 19) & 1); - cols = 8 + ((ctrl >> 26) & 7); - rows = 11 + ((ctrl >> 20) & 3); - printk(KERN_DEBUG - "SDRAM preconfigured: bus:%u bank:%u rows:%u cols:%u\n", - bus, bank, rows, cols); - iounmap(jz_emc_base); - - size = 1 << (bus + bank + cols + rows); - add_memory_region(0, size, BOOT_MEM_RAM); -} - static unsigned long __init get_board_mach_type(const void *fdt) { if (!fdt_node_check_compatible(fdt, 0, "ingenic,x2000")) @@ -68,13 +44,16 @@ static unsigned long __init get_board_mach_type(const void *fdt) void __init plat_mem_setup(void) { void *dtb = (void *)fw_passed_dtb; - int offset; __dt_setup_arch(dtb); - offset = fdt_path_offset(dtb, "/memory"); - if (offset < 0) - jz4740_detect_mem(); + /* + * Old devicetree files for the qi,lb60 board did not have a /memory + * node. Hardcode the memory info here. + */ + if (!fdt_node_check_compatible(dtb, 0, "qi,lb60") && + fdt_path_offset(dtb, "/memory") < 0) + early_init_dt_add_memory_arch(0, SZ_32M); mips_machtype = get_board_mach_type(dtb); } |