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authorRussell King <rmk+kernel@arm.linux.org.uk>2013-10-16 00:09:02 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-12-04 10:50:13 -0800
commitd88da9d09672eddc30d50dec14cd8ddc3fbc284c (patch)
tree7154b09b2756d659ecd6d83d12785d315a7f8dd8 /arch
parent71ea1738746efcffab98ff04a8a634a2e2a94400 (diff)
downloadlwn-d88da9d09672eddc30d50dec14cd8ddc3fbc284c.tar.gz
lwn-d88da9d09672eddc30d50dec14cd8ddc3fbc284c.zip
ARM: sa11x0/assabet: ensure CS2 is configured appropriately
commit f3964fe1c9d9a887d65faf594669852e4dec46e0 upstream. The CS2 region contains the Assabet board configuration and status registers, which are 32-bit. Unfortunately, some boot loaders do not configure this region correctly, leaving it setup as a 16-bit region. Fix this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-sa1100/assabet.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index 375d3f779a88..82636701bf0f 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -509,6 +509,9 @@ static void __init assabet_map_io(void)
* Its called GPCLKR0 in my SA1110 manual.
*/
Ser1SDCR0 |= SDCR0_SUS;
+ MSC1 = (MSC1 & ~0xffff) |
+ MSC_NonBrst | MSC_32BitStMem |
+ MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0);
if (!machine_has_neponset())
sa1100_register_uart_fns(&assabet_port_fns);