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| author | Shawn Guo <shawn.guo@freescale.com> | 2014-07-26 10:33:03 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-10-05 13:40:52 -0700 |
| commit | 2a3620a7e260b80bdd4532415157c4d547d9054d (patch) | |
| tree | 2420cf957e7a768102d3dd8c03fc8b2a159efe2e /arch | |
| parent | e7ac34bf5e041dbeb7596d5db91fd7e4c300da96 (diff) | |
| download | lwn-2a3620a7e260b80bdd4532415157c4d547d9054d.tar.gz lwn-2a3620a7e260b80bdd4532415157c4d547d9054d.zip | |
ARM: imx: fix TLB missing of IOMUXC base address during suspend
commit 59d05b518321618177b898a6801503e31b15b25b upstream.
After the suspend routine running in OCRAM puts DDR into self-refresh,
it will access IOMUXC block to float DDR IO for power saving. A TLB
missing of IOMUXC base address may happen in this case, and triggers an
access to DDR, and thus hangs the system.
The failure is discovered by running suspend/resume on a Cubox-i board.
Though the issue is not Cubox-i specific, it can be hit the on the board
quite easily with the 3.15 or 3.16 kernel.
Fix the issue with a dummy access to IOMUXC block at the beginning of
suspend routine, so that the address translation can be filled into TLB
before DDR is put into self-refresh.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Acked-by: Anson Huang <Anson.Huang@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-imx/suspend-imx6.S | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S index fe123b079c05..87bdf7a629a5 100644 --- a/arch/arm/mach-imx/suspend-imx6.S +++ b/arch/arm/mach-imx/suspend-imx6.S @@ -172,6 +172,8 @@ ENTRY(imx6_suspend) ldr r6, [r11, #0x0] ldr r11, [r0, #PM_INFO_MX6Q_GPC_V_OFFSET] ldr r6, [r11, #0x0] + ldr r11, [r0, #PM_INFO_MX6Q_IOMUXC_V_OFFSET] + ldr r6, [r11, #0x0] /* use r11 to store the IO address */ ldr r11, [r0, #PM_INFO_MX6Q_SRC_V_OFFSET] |