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| author | Joel Stanley <joel@jms.id.au> | 2014-07-08 16:08:20 +0930 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-07-17 16:23:12 -0700 |
| commit | 3b9ee8b77385bff2129bc37e85ce10ede67526de (patch) | |
| tree | 5e20af34263114c67aeeb81022d6d19d69902083 /arch | |
| parent | 89e1fc043f560b7c0051fa83a88fef2bafb6963e (diff) | |
| download | lwn-3b9ee8b77385bff2129bc37e85ce10ede67526de.tar.gz lwn-3b9ee8b77385bff2129bc37e85ce10ede67526de.zip | |
powerpc/kvm: Remove redundant save of SIER AND MMCR2
commit f73128f4f680e8be68cda831f2710214559583cb upstream.
These two registers are already saved in the block above. Aside from
being unnecessary, by the time we get down to the second save location
r8 no longer contains MMCR2, so we are clobbering the saved value with
PMC5.
MMCR2 primarily consists of counter freeze bits. So restoring the value
of PMC5 into MMCR2 will most likely have the effect of freezing
counters.
Fixes: 72cde5a88d37 ("KVM: PPC: Book3S HV: Save/restore host PMU registers that are new in POWER8")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Acked-by: Michael Ellerman <mpe@ellerman.id.au>
Acked-by: Paul Mackerras <paulus@samba.org>
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/kvm/book3s_hv_interrupts.S | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/powerpc/kvm/book3s_hv_interrupts.S b/arch/powerpc/kvm/book3s_hv_interrupts.S index e18e3cfc32de..92be3fad1075 100644 --- a/arch/powerpc/kvm/book3s_hv_interrupts.S +++ b/arch/powerpc/kvm/book3s_hv_interrupts.S @@ -127,11 +127,6 @@ BEGIN_FTR_SECTION stw r10, HSTATE_PMC + 24(r13) stw r11, HSTATE_PMC + 28(r13) END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201) -BEGIN_FTR_SECTION - mfspr r9, SPRN_SIER - std r8, HSTATE_MMCR + 40(r13) - std r9, HSTATE_MMCR + 48(r13) -END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) 31: /* |