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author | Helge Deller <deller@gmx.de> | 2013-06-29 22:08:03 +0200 |
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committer | Helge Deller <deller@gmx.de> | 2013-07-09 22:09:21 +0200 |
commit | 92b59929825d67db575043a76651865d16873b36 (patch) | |
tree | a6d057fc7311d88d6fad158b676bb28c35945a4a /arch | |
parent | 594174d810a29982929cbb454dafee4a1498e4fb (diff) | |
download | lwn-92b59929825d67db575043a76651865d16873b36.tar.gz lwn-92b59929825d67db575043a76651865d16873b36.zip |
parisc: optimize mtsp(0,sr) inline assembly
If the value which should be moved into a space register is zero, we can
optimize the inline assembly to become "mtsp %r0,%srX".
Signed-off-by: Helge Deller <deller@gmx.de>
Cc: <stable@vger.kernel.org> # 3.10
Diffstat (limited to 'arch')
-rw-r--r-- | arch/parisc/include/asm/special_insns.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/parisc/include/asm/special_insns.h b/arch/parisc/include/asm/special_insns.h index d306b75bc77f..e1509308899f 100644 --- a/arch/parisc/include/asm/special_insns.h +++ b/arch/parisc/include/asm/special_insns.h @@ -32,9 +32,12 @@ static inline void set_eiem(unsigned long val) cr; \ }) -#define mtsp(gr, cr) \ - __asm__ __volatile__("mtsp %0,%1" \ +#define mtsp(val, cr) \ + { if (__builtin_constant_p(val) && ((val) == 0)) \ + __asm__ __volatile__("mtsp %%r0,%0" : : "i" (cr) : "memory"); \ + else \ + __asm__ __volatile__("mtsp %0,%1" \ : /* no outputs */ \ - : "r" (gr), "i" (cr) : "memory") + : "r" (val), "i" (cr) : "memory"); } #endif /* __PARISC_SPECIAL_INSNS_H */ |